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Status Not under consideration
Workspace AIX
Created by Guest
Created on Aug 16, 2018

RELATED IDEAS

AIX kernel change to batch memory pool rebalance for DLPAR vCPU adds/removes

Today for every 8 logical CPUs, the memory pools are being rebalanced. There is serialization if the lpar is a shared processor lpar, such that rebalancing can cause a CPU add/delete operation to wait until the rebalancing is completed.

This can be significant (minutes per VCPU) on very large systems (like our 192 way 880) which is not acceptable for automated DLPAR operations.

RFE to change AIX kernel to have option to not do rebalancing until all the CPUs have been deleted or do the rebalancing first, and then add all the CPUs.

Idea priority Urgent
  • Guest
    Reply
    |     Nov 29, 2018

    The issue reported in this RFE was caused by other software in the environment that resulting in DLPAR operations being delayed. This RFE is being closed with agreement of the customer.

    AIX is continually making improvements in the memory pool re-balancing algorithms including recent scaling improvements.

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