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Finally leverage "the mainframe lesson" and fully exploit NUMA in POWERsystems
Why run VIO servers in the same cores, DIMMs, buses, etc. as all your real workloads? Instead of a 2-socket / 2 NUMA domain system, sell us an asymmetric 4-socket / 4 NUMA domain system where 2 of the sockets / domains are much smaller and contain exactly half of the I/O (NVMe / PCIe, CAPI, etc.) each. Run a VIO server in each one, and almost zero hardware interrupts would ever have to hit the "main" processing hardware. (Low-low-low end might only have support for 1 VIO module) If the fabric (for lack of a more precise term) in between the NUMA domains scales well enough, you could add a ton of much smarter I/O modules to scale things more than just adding semi-smart drawers. If it really scales well, put "main memory" behind a similar module and leave the "main processors" to do almost all CPU-bound workloads. The OS and PowerVM would need a bunch of work for that last one, but might need near-zero work for the VIOS->I/O module design.
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